Neuromorphic Computing and Engineering (Jan 2025)

Optimizing electrochemical and ferroelectric synaptic devices: from material selection to performance tuning

  • Eunjin Kim,
  • Seonuk Jeon,
  • Hyoungjin Park,
  • Jiae Jeong,
  • Hyeonsik Choi,
  • Yunsur Kim,
  • Jihyun Kim,
  • Seokjae Lim,
  • Kibong Moon,
  • Jiyong Woo

DOI
https://doi.org/10.1088/2634-4386/adb512
Journal volume & issue
Vol. 5, no. 1
p. 013001

Abstract

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Neuromorphic hardware systems emulate the parallel neural networks of the human brain, and synaptic weight storage elements are crucial for enabling energy-efficient information processing. They must represent multiple data states and be able to be updated analogously. In order to realize highly controllable synaptic devices, replacing the high-k gate dielectric in conventional transistor structures with either solid-electrolytes that facilitate bulk ionic motion or ferroelectric oxide allows for steady adjustment of channel currents in response to gate-voltage signals. This approach, in turn, accelerates backpropagation algorithms used for training neural networks. Furthermore, because the channel current in electrochemical random-access memory (ECRAM) is influenced by the number of mobile ions (e.g. Li ^+ , O ^2− , H ^+ or Cu ^+ ) passing through the electrolytes, these synaptic device candidates have demonstrated an excellent linear and symmetrical channel current response when updated using an identical pulse scheme. In the latter case, which is known as the ferroelectric field-effect transistor (FeFET), the number of electrons accumulated near the channel rapidly varies with the degree of the alignment of internal dipoles in thin doped ferroelectric HfO _2 . This leads to a multilevel state. Based on the working principles of these two promising candidates, enabling gate-controlled ion-transport primarily in electrolytes for ECRAM and understanding the relationship between polarization and the ferroelectric layer in FeFETs are crucial to improve their properties. Therefore, this paper aims to present our recent advances, highlighting the engineering approaches and experimental findings related to ECRAM and FeFET for three-terminal synaptic devices.

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