Lifting Based Object Detection Networks of Remote Sensing Imagery for FPGA Accelerator

Abstract

The on-board object detection of remote sensing images is of great significance and challenges in both military and civilian fields. To achieved on-board object detection, we require a high-performance and low power hardware architecture. Inspired by the hardware implementation advantages of the lifting scheme in JPEG2000, we introduce the lifting scheme into object detection networks to promote the hardware implementation capability. Based on the equivalence between the lifting scheme and the convolution, we proposed a lifting based FPGA accelerator. The lifting scheme provides a parallel strategy for every convolutional layer to obtain high performance, and high resource utilization. The proposed accelerator can improve the throughput of networks, and promote the utilization efficiency of hardware resources. The experimental results on lifting based YOLOv3-tiny (LS-YOLOv3-tiny) show that the proposed accelerator has better power efficiency than other hardware implementation, and have better DSP efficiency than other FPGA-based designs.

Keywords

• Lifting scheme
• object detection network
• hardware accelerator
• FPGA