IET Power Electronics (May 2024)

Investigations of 4H‐SiC trench MOSFET with integrated high‐K deep trench and gate dielectric

  • Jiafei Yao,
  • Yuao Liu,
  • Ang Li,
  • Xue Han,
  • Qing Yao,
  • Kemeng Yang,
  • Man Li,
  • Jing Chen,
  • Maolin Zhang,
  • Jun Zhang,
  • Yufeng Guo

DOI
https://doi.org/10.1049/pel2.12700
Journal volume & issue
Vol. 17, no. 7
pp. 869 – 877

Abstract

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Abstract This paper proposes and investigates a novel 4H‐SiC trench MOSFET (TMOS) with integrated high‐K deep trench and gate dielectric (INHK‐TMOS). The integrated high‐K (INHK) consists of a high‐K gate dielectric and an extended high‐K deep trench dielectric in the drift region. Firstly, the high‐K gate dielectric together with the metal‐forming high‐K metal gate structure, which increases the gate oxide capacitance (COX), reduces the threshold voltage (VTH) and the specific on‐resistance (Ron,sp). Secondly, the extended high‐K deep trench dielectric not only modulates the electric field in the drift region by introducing a new electric field peak at the bottom of the high‐K deep trench dielectric, thereby enhancing the breakdown voltage (BV), but also improves the doping concentration (ND) of the drift region by the assist depletion effect of the high‐K dielectric, further optimizing the forward conduction characteristics. Simulation results demonstrate that when compared to the conventional TMOS, the INHK‐TMOS using HfO2 exhibits a 52.6% reduction in VTH, a 52.1% reduction in Ron,sp, a 20.3% increasement in BV and a 202.3% improvement in figure of merit.

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