International Journal of Reconfigurable Computing (Jan 2012)
Throughput Analysis for a High-Performance FPGA-Accelerated Real-Time Search Application
Abstract
We propose an FPGA design for the relevancy computation part of a high-throughput real-time search application. The application matches terms in a stream of documents against a static profile, held in off-chip memory. We present a mathematical analysis of the throughput of the application and apply it to the problem of scaling the Bloom filter used to discard nonmatches.