Results in Engineering (Sep 2024)
A novel reduced local search algorithm for optimization of digital filter coefficients
Abstract
Digital Filtering is an important operation in DSP. Most of the DSP applications demand low power implementations. In CMOS digital circuits, switching from logic 0 to logic 1 and vice-versa decides the dynamic power consumption. This paper proposes and develops a novel algorithm based on mixed integer linear programming to minimize the number of ones (filter cost) in filter coefficients, which in turn minimizes the switching factor of CMOS circuits and the number of additional adders needed for hardware implementation. The search space for finding the optimal value of the coefficient is reduced thereby increasing the speed of execution of the algorithm. The average reduction of 18.02 % in the number of transitions is obtained with the proposed algorithm. The suggested technique results in an 18.72 % decrease in the typical price of digital filters. Also the proposed algorithm works faster than the previously proposed algorithm used for finding the optimized coefficients.