On-Chip CMOS Power Meter for Solar Cell Maximum Power Point Tracking

Abstract

This manuscript proposes and describes an on-chip power meter for photo voltaic power generation aimed at portable systems. The power meter provides the average measure for Maximum PowerPoint Tracking in DC-DC converters. The integrated chip power meter estimates the average current consumption using the DC-DC control system’s discrete-time nature. The power meter synthesis in a 65nm CMOS process explores the implementation with a simple structure and the theoretical considerations for real power measurement. The experimental results with 1.2 Volts in bias conditions consume 5 percent of the overall DC-DC control system with the possible application into systems with alternative energy transducers.

Keywords

• ASIC
• MPPT
• integrated circuit design
• remote electronic devices