A Self-Body-Biasing Network of Vector Sum Phase Shifter for Reduction of Output Capacitance Variation and Supply Current Variation

Abstract

This paper presents the self-body-biasing effects of a vector-sum phase shifter(VSPS) in 0.13- $\mu $ m CMOS technology. The self-body-biasing network is simply implemented by connecting the drain and body terminals of a vector-sum MOSFET amplifier through a single resistor. The proposed network reduces the output capacitance variations of the MOSFET amplifier and the total current variation of the phase shifter. The phase and amplitude of the phase shifter output signal are strongly influenced by these variations. The phase shifter covers full 360° by 6-bit digital control and its return loss is less than 7 dB for 64 states at 5-6 GHz. The RMS phase error is less than 3.1°, and the RMS amplitude error is less than 0.48 dB. The total current consumption is 6 mA from 1.2 V supply voltage.

Keywords

• Body biasing
• CMOS
• output capacitances
• phase shifter
• vector-sum