Single Miller frequency compensation: Three stage CMOS

Abstract

A simple and efficient frequency compensation network is exploited for a three-stage amplifier. Single Miller capacitor at the output of a differential stage forms compensation network. This configuration benefits from less dependency to compensation capacitor since only one and small value capacitor is used. This stems from the fact that the differential block intensifies Miller effect virtually by multiplying its gain value to capacitor value. The structure is modeled symbolically with exclusive formulation for involved dynamics. Also, circuit implementation is performed via 0.18μmCMOS technology. Both theoretical and simulation results are compatible with negligible error. According to the simulation results, proposed three stage amplifiers in this work show 135 dB, 7.5 MHz and 85º as DC gain, GBW and PM respectively.

Keywords

• CMOS
• OTA
• Compensation network
• Multi-stage amplifier
• Miller capacitor