Analytic Model of Threshold Voltage (V<sub>TH</sub>) Recovery in Fully Recessed Gate MOS-Channel HEMT (High Electron Mobility Transistor) after OFF-State Drain Stress
René Escoffier,
Blend Mohamad,
Julien Buckley,
Romain Gwoziecki,
Jérome Biscarrat,
Véronique Sousa,
Marc Orsatelli,
Emmanuel Marcault,
Julien Ranc,
Roberto Modica,
Ferdinando Iucolano
Affiliations
René Escoffier
Commissariat à l’Énergie Atomique et aux Énergies Alternatives (CEA), University of Grenoble Alpes, Leti, 38000 Grenoble, France
Blend Mohamad
Commissariat à l’Énergie Atomique et aux Énergies Alternatives (CEA), University of Grenoble Alpes, Leti, 38000 Grenoble, France
Julien Buckley
Commissariat à l’Énergie Atomique et aux Énergies Alternatives (CEA), University of Grenoble Alpes, Leti, 38000 Grenoble, France
Romain Gwoziecki
Commissariat à l’Énergie Atomique et aux Énergies Alternatives (CEA), University of Grenoble Alpes, Leti, 38000 Grenoble, France
Jérome Biscarrat
Commissariat à l’Énergie Atomique et aux Énergies Alternatives (CEA), University of Grenoble Alpes, Leti, 38000 Grenoble, France
Véronique Sousa
Commissariat à l’Énergie Atomique et aux Énergies Alternatives (CEA), University of Grenoble Alpes, Leti, 38000 Grenoble, France
Marc Orsatelli
Commissariat à l’Énergie Atomique et aux Énergies Alternatives (CEA), CEA-Tech Occitanie, 31670 Labege, France
Emmanuel Marcault
Commissariat à l’Énergie Atomique et aux Énergies Alternatives (CEA), CEA-Tech Occitanie, 31670 Labege, France
Julien Ranc
Commissariat à l’Énergie Atomique et aux Énergies Alternatives (CEA), CEA-Tech Occitanie, 31670 Labege, France
Today, wide bandgap (WBG) GaN semiconductors are considered the future, allowing the improvement of power transistors. The main advantage of GaN is the presence of two-dimensional electron gas (2Deg) typically used as a conduction layer in normally-on and normally-off transistors. Concerning the normally-off family, several solutions are proposed. Among these, one of the most promising is the MIS-Gate technology that features a gate recess architecture allowing the semiconductor to physically cut off the 2Deg and drastically decrease gate–source leakage currents. The Vth relaxation characteristic, after voltage stress, has been investigated. It has been shown that the main impact is due to charges close to the gate dielectric/GaN interface, precisely dwelling within the dielectric or the GaN epitaxy. This work provides an analytical model of the Vth evolution of these MIS-GATE (metal insulator semiconductor gate) transistors fabricated on GaN-silicon substrate. This model allows the extraction of different trap energy levels from a temporary threshold voltage (Vth) shift after 650 V stress. Based on this method, it is possible to identify up to four different trap energy levels. By comparing state of the art methods, we show that these obtained energy levels are well correlated with either magnesium and carbon impurity or Ga and/or N vacancy sites in the GaN epitaxy.