Alexandria Engineering Journal (Aug 2023)

Capacitor ripple reduction in T-type multilevel inverter operation for solar PV-application

  • Mohammad Ali,
  • Md Ismail Hossain,
  • Fahad Saleh Al-Ismail,
  • Mohammad Ali Abido,
  • Muhammad Khalid

Journal volume & issue
Vol. 77
pp. 613 – 624

Abstract

Read online

Efficient and reliable power electronic converters are desired to integrate renewable energy sources into households or the grid. Multilevel inverters for their benefits are being explored for low-power applications. In this work, recently introduced 9-level T-Type switched-capacitor multilevel inverters are explored for 11-level operation, increasing their reliability in high-temperature conditions. The operation makes it capable of generating more voltage levels than the prior technology and diminishes capacitor inrush currents. Eventually, in 9-level operation, the undesired continuous high inrush current peaks are inevitable, which heat the capacitors due to electrolytic series resistance (ESR). This leads to early electrolyte evaporation and thus results in capacitance variation and an increase of ESR with time. In order to suppress the capacitor inrush currents, additional inductance of small value in the charging circuit is sought to mitigate these currents, but that leads to increased losses and increased switch ringing effect. In this work, the modulation of the inverter is performed to produce 11-levels at the inverter output. Inverter redundant states are so employed that the capacitors are always charged and discharged through the load. This results in reduction of inrush current peaks by approximately 20 times, thereby increasing the reliability and life of the inverter and making them more suitable for Solar PV applications in harsh weather conditions. This structure and modulation strategy also achieves lower switch voltage and current stresses. The improved topology and the modulation strategy are validated on the controller hardware-in-the-loop (CHIL) setup and PLECS environments. Further, the topologies are experimentally validated on a laboratory prototype.

Keywords