Journal of Low Power Electronics and Applications (Apr 2014)

Ultralow-Power SOTB CMOS Technology Operating Down to 0.4 V

  • Nobuyuki Sugii,
  • Yoshiki Yamamoto,
  • Hideki Makiyama,
  • Tomohiro Yamashita,
  • Hidekazu Oda,
  • Shiro Kamohara,
  • Yasuo Yamaguchi,
  • Koichiro Ishibashi,
  • Tomoko Mizutani,
  • Toshiro Hiramoto

DOI
https://doi.org/10.3390/jlpea4020065
Journal volume & issue
Vol. 4, no. 2
pp. 65 – 76

Abstract

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Ultralow-voltage (ULV) CMOS will be a core building block of highly energy efficient electronics. Although the operation at the minimum energy point (MEP) is effective for ULP CMOS circuits, its slow operation speed often means that it is not used in many applications. The silicon-on-thin-buried-oxide (SOTB) CMOS is a strong candidate for the ultralow-power (ULP) electronics because of its small variability and back-bias control. Proper power and performance optimization with adaptive Vth control taking advantage of SOTB’s features can achieve the ULP operation with acceptably high speed and low leakage. This paper describes our results on the ULV operation of logic circuits (CPU, SRAM, ring oscillator and other logic circuits) and shows that the operation speed is now sufficiently high for many ULP applications. The “Perpetuum-Mobile” micro-controllers operating down to 0.4 V or lower are expected to be implemented in a huge number of electronic devices in the internet-of-things (IoT) era.

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