Characterization of floating-gate memory device with thiolate-protected gold and gold-palladium nanoclusters

Abstract

The floating-gate memory characteristics of thiolate-protected gold (Au:SR) and palladium doped Au (AuPd:SR) nanoclusters, Au25(SR)18, Au24Pd(SR)18, and Au38(SR)24 (R = C12H25), were investigated by capacitance-voltage (C–V) measurements in vacuum. Monolayer films of Au:SR nanoclusters were formed as floating-gate memory layers on p-type Si substrates by the Langmuir-Schaefer method with surface pressure − area (π-A) isotherm measurements. A fluoropolymer (CYTOP, ∼15 nm thick) was spin-coated on top to form a hydrophobic insulating layer. Using an Au pad (∼40 nm thick) as the gate electrode, C–V measurements exhibit clockwise hysteresis curves originating from the Au:SR and AuPd:SR nanoclusters against the reference measured in each sample, and the hysteresis widths were dependent on the composition and sizes of the Au:SR nanoclusters. The positive and negative voltage shifts in the hysteresis can be explained in terms of electronic structures in Au:SR and AuPd:SR-based devices.