IEEE Photonics Journal (Jan 2024)

Designing a Sub-20V Breakdown Voltage SPAD With Standard CMOS Technology and n/p-well Structure

  • Jau Yang Wu,
  • Chun-Hsien Liu

DOI
https://doi.org/10.1109/JPHOT.2024.3361732
Journal volume & issue
Vol. 16, no. 2
pp. 1 – 8

Abstract

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We have proposed a structural design for a single photon avalanche diode with a low breakdown voltage. This diode is fabricated using Taiwan Semiconductor Manufacturing Company (TSMC) 0.18 μm HV CMOS technology, and it can maintain a high operating excess voltage in an n-on-p design without requiring any additional customized well layers. The n-on-p type device is particularly advantageous for a 3D-stacked backside illuminated structure and offers excellent photon detection capabilities at longer wavelengths. By incorporating a high doping concentration PDD well layer, we can significantly increase the excess bias, resulting in enhanced photon detection probability in the near-infrared wavelength range, all while maintaining a lower voltage due to a reduction in breakdown voltage. This design also leads to power consumption savings. As a result, our designed device is well-suited for consumer applications such as 3D image rendering and LiDAR technology.

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