Exploiting Smallest Error to Calibrate Non-Linearity in SAR Adcs

Abstract

This paper presents a statistics-optimized organization technique to achieve better element matching in successive approximation register (SAR) analog-to-digital converter (ADC) in smart sensor systems. We demonstrate the proposed technique ability to achieve a significant improvement of around 23 dB on a spurious free dynamic range (SFDR) of the ADC than the conventional, testing with a capacitor mismatch σu = 0.2% in a 14-bit SAR ADC system. For the static performance, the max root mean square (rms) value of differential nonlinearity reduces from 1.63 to 0.20 LSB and the max rms value of integral nonlinearity (INL) reduces from 2.10 to 0.21 LSB. In addition, it is demonstrated that by applying grouping optimization and strategy optimization, the performance boosting on the SFDR can be effectively achieved. Such a great improvement on the resolution of the ADC only requires an off-line pre-processing digital part.

Keywords

• Analog-to-digital converter
• capacitor mismatch calibration
• smart sensor
• successive approximation register (SAR) ADC