Analysis and design of a cocurrent dual-band CMOS low noise amplifier

Abstract

A concurrent dual-band low noise amplifier(LNA) targeted for WLAN IEEE 802.11 a/b/g standards is designed using 0.13 μm CMOS process. To attain the power-constrained simultaneous noise figure and input matching, cascode inductive degeneration topology is adopted. The LNA achieves input reflection coefficients of -16.7 dB and -19.5 dB, forward gains of 16.8 dB and 17.2 dB at 2.4 GHz and 5.2 GHz, respectively. Furthermore, the LNA exhibits noise figures of 3.1 dB and 3.2 dB while input third-order intercept points of -18.5 and -16.5 dBm at 2.4 and 5.2 GHz, respectively. The LNA dissipates 2.64 mW of power from a 1.2 V supply.

Keywords

• dual-band
• low noise amplifier(LNA)
• low power consumption
• high gain