Design and implementation of DSR routing table entries for FPGA

Abstract

Ad Hoc network is a new type of communication technology that has developed rapidly in the field of wireless communication in recent years. It does not rely on fixed communications infrastructure, and has great flexibility and independence. It is applicable to many scenarios where network cabling is difficult. DSR protocol is an on-demand routing control protocol designed for Ad Hoc networks. It is considered to be one of the most promising Ad Hoc network routing protocols. The core of the DSR protocol is the routing table entry that the node manages to communicate with other nodes. This article focuses on designing and implementing an FPGA method that supports DSR routing table entry management based on finite state machines (FSM).

Keywords

• Ad Hoc
• DSR
• routing table entry
• FPGA
• FSM