Alexandria Engineering Journal (Dec 2024)

Implementation of direct demodulator based on ANN using FPGA

  • Vineetha K.V.,
  • Chinthala Ramesh,
  • Dhanesh G. Kurup

Journal volume & issue
Vol. 108
pp. 730 – 753

Abstract

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This paper presents the design and implementation of a direct amplitude (AM) demodulator using artificial neural network (ANN) on field programmable gate array (FPGA), which enables direct demodulation of modulated carriers to baseband waveforms. This direct AM demodulator introduces a novel approach by eliminating the need for intermediate frequency (IF) conversion, leveraging a neural network instead of a traditional analog local oscillator and mixer. Eliminating the IF stage allows for the use of wider bandwidth, supporting modern wideband communication systems. By omitting these conventional components, the proposed ANN-based direct AM demodulator reduces system noise, thereby enhancing fidelity. The proposed ANN-based direct AM demodulator uses a pre-processing technique to generate the carrier signal digitally at the input of the ANN enabling effective handling of high-frequency modulated signals. The implementation of the proposed ANN-based direct AM demodulator targets the XC7VX690T Virtex-7 FPGA platform, validated using Xilinx Vivado simulations. The ANN’s adaptability across different carrier frequencies enhances hardware reusability and resource efficiency. The ANN-based direct AM demodulator implemented on FPGA is faster than the ANN implemented using the C++ based fast artificial neural network (FANN) library which reduces the overall processing time and allows the operation of higher carrier frequencies. Results demonstrate the demodulator’s capability to process sine and square waves across a wide frequency range: modulating frequencies from 2.5 MHz to 20 MHz and carrier frequencies from 50 MHz to 200 MHz supporting a maximum bandwidth of 40 MHz. The proposed demodulator operates efficiently at a maximum carrier frequency of 200 MHz, with a sampling frequency of 1.66 GHz. Experimental results confirm the ANN’s robust performance across varying signal-to-noise ratios (SNRs) from 10 dB to 100 dB, showcasing MSE values ranging from 0.06 to 0.000001. Further to add, no noise filter is required after an SNR of 30 dB. The design is achieving only 16% amplitude distortion, thus offering an acceptable fidelity. The proposed demodulator consumed only 63.25% of LUT slices for a single hidden layer and 82.36% of LUT slices for two hidden layers ANN implementations on the specified FPGA board. DSP48E1 units used are 37.71% for the single layer and 60.21% for the multi-layer. The processing speed of the ANN based direct AM demodulator implemented on FPGA is 60.125, and 44.65 at fc of 50 MHz, and 200 MHz respectively. Overall, this ANN-FPGA based approach represents a significant advancement in AM demodulation technology, offering enhanced adaptability and performance compared to traditional methods.

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