Improved I<sub>on</sub>/I<sub>off</sub> Current Ratio and Dynamic Resistance of a p-GaN High-Electron-Mobility Transistor Using an Al<sub>0.5</sub>GaN Etch-Stop Layer
Hsiang-Chun Wang,
Chia-Hao Liu,
Chong-Rong Huang,
Min-Hung Shih,
Hsien-Chin Chiu,
Hsuan-Ling Kao,
Xinke Liu
Affiliations
Hsiang-Chun Wang
College of Materials Science and Engineering, Shenzhen University-Hanshan Normal University Postdoctoral Workstation, Shenzhen University, Shenzhen 518060, China
Chia-Hao Liu
Department of Electronic Engineering, Chang Gung University, Taoyuan 333, Taiwan
Chong-Rong Huang
Department of Electronic Engineering, Chang Gung University, Taoyuan 333, Taiwan
Min-Hung Shih
Department of Electronic Engineering, Chang Gung University, Taoyuan 333, Taiwan
Hsien-Chin Chiu
Department of Electronic Engineering, Chang Gung University, Taoyuan 333, Taiwan
Hsuan-Ling Kao
Department of Electronic Engineering, Chang Gung University, Taoyuan 333, Taiwan
Xinke Liu
Key Laboratory of Optoelectronic Devices and Systems, Ministry of Education and Guangdong Province, College of Physics and Optoelectronic Engineering, Shenzhen University, Shenzhen 518060, China
In this study, we investigated enhance mode (E-mode) p-GaN/AlGaN/GaN high-electron-mobility transistors (HEMTs) with an Al0.5GaN etch-stop layer. Compared with an AlN etch-stop layer, the Al0.5GaN etch-stop layer not only reduced lattice defects but engendered improved DC performance in the device; this can be attributed to the lattice match between the layer and substrate. The results revealed that the Al0.5GaN etch-stop layer could reduce dislocation by 37.5% and improve device characteristics. Compared with the device with the AlN etch-stop layer, the p-GaN HEMT with the Al0.5GaN etch-stop layer achieved a higher drain current on/off ratio (2.47 × 107), a lower gate leakage current (1.55 × 10−5 A/mm), and a lower on-state resistance (21.65 Ω·mm); moreover, its dynamic RON value was reduced to 1.69 (from 2.26).