Design and research on digital baseband of RFID tag based on SystemVerilog

Abstract

Based on the ISO/IEC 18000-6C standard protocol, this paper conducted research on the design and implementation of UHF RFID tag′s physical layer baseband circuit. According to the design requirements and indicators of the baseband specified in the standard protocol, SystemVerilog was used to model the tag sending and receiving basebands, and the theoretical derivation and design implementation of the key modules in the baseband were given. SystemVerilog, as a hardware description and verification language developed on the basis of Verilog, can greatly improve the efficiency of SoC design. Finally, Modelsim SE-64 10.4 was used to simulate the digital baseband circuit design of the tag. The results showed that the digital baseband met the requirements of ISO/IEC 18000-6C protocol. This design provides a design reference for single-chip UHF RFID tag.

Keywords

• iso/iec 18000-6c
• systemverilog
• communication link
• rfid
• simulatuion verification