A novel current-limiting method for MMC-HVDC by coordinating virtual impedance control and fault current limiter

Abstract

The modular multilevel converter (MMC) topology is very suitable for high voltage direct current (HVDC) system to achieve feasible power control, favorable black start capability as well as long-distance power transmission. This paper proposes a novel current-limiting method based on the coordination of virtual impedance control (VIC) and resistive fault current limiter (R-FCL) for MMC-HVDC, and it aims to effectively decrease the DC fault current level and assist the DC circuit breaker (DCCB) to remove the fault reliably and smoothly. Firstly, the MMC-HVDC’s topology and control strategy are expounded, and the modeling method of the VIC and the R-FCL is presented. According to the DC fault evolution, the time sequence coordination scheme of the VIC and the R-FCL for the MMC-HVDC is put forward. Then, considering the introduction of the proposed current-limiting method, the fault characteristics of the MMC-HVDC are theoretically deduced, and the capacity design of the VIC and the R-FCL is conducted. Using MATLAB, a typical ±320 kV MMC-HVDC system with VIC, R-FCL, and DCCB is built, and comparative simulations are performed. The results indicate the proposed approach can strongly limit the DC fault current within the acceptable range, and reduce the electrical stress and thermal stress in the MMC and DCCB. The proposed approach possesses better techno-economics than the R-FCL alone to solve the DC fault problem, and a more efficient protection of the MMC-HVDC is realized.

Keywords

• Current-limiting method
• MMC-HVDC
• DC fault
• Fault current limiter
• Virtual impedance control