IEEE Access (Jan 2020)

Efficient Bit-Parallel Multiplier for All Trinomials Based on <italic>n</italic>-Term Karatsuba Algorithm

  • Sun-Mi Park,
  • Ku-Young Chang,
  • Dowon Hong,
  • Changho Seo

DOI
https://doi.org/10.1109/ACCESS.2020.3023804
Journal volume & issue
Vol. 8
pp. 173491 – 173507

Abstract

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Recently, hybrid multiplication schemes over the binary extension field $GF(2^{m})$ based on $n$ -term Karatsuba algorithm (KA) have been proposed for irreducible trinomials. Their complexities depend on a decomposition of $m$ and the choice of a generation polynomial. However, these multipliers have some limitations on a decomposition of $m$ or generation polynomial $x^{m}+x^{k}+1$ such that $m\geq 2k$ . In this paper, we loosen such limited conditions. We present a new hybrid bit-parallel multiplier based on $n$ -term KA for any irreducible trinomial $x^{m}+x^{k}+1\,\,(0< k< m)$ , where $m$ is decomposed as $m=nm_{0}+r$ with $0< r< m_{0}$ and $1< n$ . (Here, various values for $n,m_{0}$ and $r$ may be chosen.) To this end, we generalize the previously proposed multiplication scheme for $x^{nm_{0}+1}+x^{k}+1$ into $x^{nm_{0}+r}+x^{k}+1$ . We evaluate the explicit complexity of the proposed multiplier. Specific comparisons show that the proposed multiplier achieves the lowest space complexity with the same or lower time complexity among hybrid multipliers. Compared to the fastest multipliers, the time complexity of the proposed multiplier costs only $T_{X}$ higher while its space complexity is much lower (it has roughly 40% reduced space complexity), where $T_{X}$ is the delay of one 2-input XOR gate.

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