IEEE Access (Jan 2022)

A Stress-Relieved Method Based on Bottom Pattern Design Considering Thermal and Mechanical Behavior of DBC Substrate

  • Chi Zhang,
  • Cai Chen,
  • Yi Zhang,
  • Yiyang Yan,
  • Yong Kang

DOI
https://doi.org/10.1109/ACCESS.2022.3225657
Journal volume & issue
Vol. 10
pp. 125735 – 125743

Abstract

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Currently, stress analysis on direct bonded copper (DBC) is mainly based on a model with symmetrical top and bottom copper layers. These analyses provide thermal-mechanical stress-relieving methods at the outer edge of the copper-ceramic interface in DBC. However, these methods are unsuitable to release the concentrated stress at the inner gap edges where the top copper layer is etched into the circuit pattern. The stress-concentrated phenomenon causes initial delamination at the inner gap edge of the top copper-ceramic interface in DBC usage. Hence, this paper analyzed the mechanism of the phenomenon and proposed a bottom pattern design method to solve this problem. Through stress analysis on a simplified DBC model with etched top copper, the phenomenon can be explained by the large composite stress produced by the opposite bending actions of the top and bottom copper-ceramic interface in DBC. To reduce the effect of bending action on the bottom interface, parallel dimple traces are used on the bottom instead of a mirror-copied gap on consideration of thermal resistance and mechanical strength. The parameters of dimple trace were chosen by simulations on stress-strain results under thermal cycling and thermal resistance calculations in a module packaging. FE results show that the bottom dimple trace with a diameter of 0.4mm and a gap of 2mm can adjust the thermal-induced strain behavior of the singularities at the top copper to be even and sacrifices only a 2% thermal resistance rise of the module packaging. A life prediction model based on strain shows that the bottom design can improve the lifetime of the substrate. The thermal cycling test result on sample DBC and thermal resistance measurement on the module packaged by DBC with bottom pattern design verify the FE analysis. This method can be widely used in the packaging design of power modules using stand-alone DBC substrate.

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