A Unified Semiconductor-Device-Physics-Based Ballistic Model for the Threshold Voltage of Modern Multiple-Gate Metal-Oxide-Semiconductor Field-Effect-Transistors

Abstract

Based on the minimum conduction band edge caused by the minimum channel potential resulting from the quasi-3D scaling theory and the 3D density of state (DOS) accompanied by the Fermi–Dirac distribution function on the source and drain sides, a unified semiconductor-device-physics-based ballistic model is developed for the threshold voltage of modern multiple-gate (MG) transistors, including FinFET, Ω-gate MOSFET, and nanosheet (NS) MOSFET. It is shown that the thin silicon, thin gate oxide, and high work function will alleviate ballistic effects and resist threshold voltage degradation. In addition, as the device dimension is further reduced to give rise to the 2D/1D DOS, the lowest conduction band edge is increased to resist threshold voltage degradation. The nanosheet MOSFET exhibits the largest threshold voltage among the three transistors due to the smallest minimum conduction band edge caused by the quasi-3D minimum channel potential. When the n-type MOSFET (N-FET) is compared to the P-type MOSFET (P-FET), the P-FET shows more threshold voltage because the hole has a more effective mass than the electron.

Keywords

• quasi-3D scaling theory
• Ω-gate MOSFET
• FinFET
• nanosheet transistor
• ballistic effects
• ballistic threshold voltage