Emerging MoS2 Wafer-Scale Technique for Integrated Circuits

Zimeng Ye; Chao Tan; Xiaolei Huang; Yi Ouyang; Lei Yang; Zegao Wang; Mingdong Dong

doi:10.1007/s40820-022-01010-4

Nano-Micro Letters (Jan 2023)

Emerging MoS2 Wafer-Scale Technique for Integrated Circuits

Zimeng Ye,
Chao Tan,
Xiaolei Huang,
Yi Ouyang,
Lei Yang,
Zegao Wang,
Mingdong Dong

Affiliations

Zimeng Ye: College of Materials Science and Engineering, Sichuan University
Chao Tan: College of Materials Science and Engineering, Sichuan University
Xiaolei Huang: State Key Laboratory of Solidification Processing, Center of Advanced Lubrication and Seal Materials, Northwestern Polytechnical University
Yi Ouyang: Interdisciplinary Nanoscience Center, Aarhus University
Lei Yang: College of Materials Science and Engineering, Sichuan University
Zegao Wang: College of Materials Science and Engineering, Sichuan University
Mingdong Dong: Interdisciplinary Nanoscience Center, Aarhus University

DOI: https://doi.org/10.1007/s40820-022-01010-4
Journal volume & issue: Vol. 15, no. 1
pp. 1 – 42

Abstract

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Highlights This review summarized the state of the art of MoS2 from their controllable growth and potential application in integrated circuit. The influence of promoter, substrate, pressure, catalyst and precursor on the nucleation and growth are discussed. The current challenges and future perspectives of wafer-scale MoS2 are outlined from the materials and device applications.

Published in Nano-Micro Letters

ISSN: 2311-6706 (Print); 2150-5551 (Online)
Publisher: SpringerOpen
Country of publisher: Germany
LCC subjects: Technology
Website: http://www.springer.com/40820

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