ETRI Journal (Aug 2020)

Function‐level module sharing techniques in high‐level synthesis

  • Hiroki Nishikawa,
  • Kenta Shirane,
  • Ryohei Nozaki,
  • Ittetsu Taniguchi,
  • Hiroyuki Tomiyama

DOI
https://doi.org/10.4218/etrij.2020-0107
Journal volume & issue
Vol. 42, no. 4
pp. 527 – 533

Abstract

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High‐level synthesis (HLS), which automatically synthesizes a register‐transfer level (RTL) circuit from a behavioral description written in a high‐level programming language such as C/C++, is becoming a more popular technique for improving design productivity. In general, HLS tools often generate a circuit with a larger area than those of hand‐designed ones. One reason for this issue is that HLS tools often generate multiple instances of the same module from a function. To eliminate such a redundancy in circuit area in HLS, HLS tools are capable of sharing modules. Function‐level module sharing at a behavioral description written in a high‐level programming language may promote function reuse to increase effectiveness and reduce circuit area. In this paper, we present two HLS techniques for module sharing at the function level.

Keywords