Implementation and Evaluation of Two Independent Ising Machines on Same FPGA Board by Reducing Number of Interactions Inside Ising Machine

Abstract

The development of annealing processors has progressed as a solution to large-scale combinatorial optimization problems. Inside a fully-coupled annealing machine that can handle a wide range of combinatorial optimization problems, there are elements called interactions that indicate the force between spins, the number of which is the square of the number of spins. However, the area of the circuit is greatly restricted. Therefore, we focus on the symmetry of interactions and propose a method for reducing the number of interactions by giving regularity to the two-dimensional arrangement of interactions. The interaction halving method has a high affinity with the previously published scalable fully-coupled annealing machine, and the interaction proposed this time for the 384-spin full-coupled annealing machine using 16 Field Programmable Gate Array chips shown in previous research. By applying the reduction method, we succeeded in implementing two independent 384-spin fully coupled annealing machines with 16 chips.

Keywords

• Annealing
• annealing processor
• FPGA implementation
• interaction reduction
• Ising machine
• simulated annealing