Design of conservative, reversible sequential logic for cost efficient emerging nano circuits with enhanced testability

Abstract

The CMOS faces challenges related to the increment in leakage-current to power-consumption. QCA is a promising alternative to overcome these challenges successfully. On the other hand, reversible logic plays a significant role in quantum-computing. Keeping this technique in mind, a conservative-reversible flip-flops and counter are explored here which will bring QCA and reversible computing together in a single-platform. In synthesizing, a reversible-conservative-quantum-cellular-automata (R-CQCA) is proposed. The proposed D, T, JK and dual-edge master-slave flip-flops advocate an improvement of 20%, 46.6%, 50%, and 36.66% respectively than its counterpart in quantum-cost. Further, the 100% fault-coverage by stuck-fault is framed in R-CQCA, which can be useful for a tester to maintain data-integrity. Also, the R-CQCA layout is implemented in QCA, which achieve some parameters such as cell-complexity of 177, leakage-energy-dissipation of 0.1055 eV, and size of 0.24 µm2. Moreover, R-CQCA is better than FRG, RM, PPRG and MX-cqca regarding QCA-primitives are reported here. Keywords: Reversible logic, Conservative reversible logic, Reversible flip-flop, Reversible counter, QCA, Quantum cost