Analysis and Simulation of  Functional Stress Degradation on VDOMS Power Transistors

M.  Zoaeter; B.  Beydoun; M.  Hajjar; M.  Debs; J-P  Charles

doi:10.1080/08827510213500

Active and Passive Electronic Components (Jan 2002)

Analysis and Simulation of Functional Stress Degradation on VDOMS Power Transistors

M. Zoaeter,
B. Beydoun,
M. Hajjar,
M. Debs,
J-P Charles

Affiliations

M. Zoaeter: Laboratoire de Physique des Matériaux, Faculty of Science-I, Lebanese University, P.O.Box 13-5789, Beirut 1102-2070, Lebanon
B. Beydoun: Laboratoire de Physique des Matériaux, Faculty of Science-I, Lebanese University, P.O.Box 13-5789, Beirut 1102-2070, Lebanon
M. Hajjar: Laboratoire de Physique des Matériaux, Faculty of Science-I, Lebanese University, P.O.Box 13-5789, Beirut 1102-2070, Lebanon
M. Debs: Laboratoire de Physique des Matériaux, Faculty of Science-I, Lebanese University, P.O.Box 13-5789, Beirut 1102-2070, Lebanon
J-P Charles: Matériaux Optiques, Photonique et Systèmes (MOPS), CLOES, Supelec, 2, rue Edouard Belin, Metz 57070, France

DOI: https://doi.org/10.1080/08827510213500
Journal volume & issue: Vol. 25, no. 3
pp. 215 – 223

Abstract

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The use of VDMOS transistor under certain functional stress conditions produces a modification of its physical and electrical properties. This paper explores the physical analysis and SPICE simulation of the degradation effects related to the component micronic structure, and points out the degraded parameters following this stress.

Published in Active and Passive Electronic Components

ISSN: 0882-7516 (Print); 1563-5031 (Online)
Publisher: Wiley
Country of publisher: United Kingdom
LCC subjects: Technology: Electrical engineering. Electronics. Nuclear engineering
Website: https://onlinelibrary.wiley.com/journal/5080

About the journal