Analog/RF Performance Investigation of Dopingless FET for Ultra-Low Power Applications

Abstract

In this paper, we investigated the performance of a dopingless (DL) double gate fieldeffect transistor (DL-DGFET) for ultra-low power (ULP) analog/RF applications. It is observed that the source/drain metal electrode work-function engineering in DL-DGFET yields improved analog/RF performance as compared to underlap inversion mode (IM) and junctionless (JL) DGFETs. The DL-DGFET exhibits superior electrostatic control, low threshold voltage variability, simpler fabrication process, and comparable ON state current as compared to IM- and JL-DGFETs. In addition, the DL-DGFET alleviates the inherent contradictory trade-off between gain and bandwidth by exhibiting the simultaneous improvement in intrinsic voltage gain (Avo) and unity gain cutoff frequency (fT). The well calibrated TCAD simulation results of the DL-DGFET show a minimum noise figure (NFmin) 1.27 times and 2.29 times less than the IM and JL-DGFET. At gate overdrive voltage of 0.1 V, the DL-DGFET achieves 5.08 times fT and 5.86 times maximum oscillation frequency (fMAX) along with 3.59 times Avo in comparison to JL-DGFET. From simulation results, it is evident that the dopingless FET is a promising candidate for ultra-low power applications of analog and radio frequency (RF) domains.

Keywords

• Charge-plasma
• doping-less
• transconductance
• minimum noise figure
• ultra low power (ULP)