Demonstration of a simple and efficient design methodology for high‐voltage floating field limiting ring in SiC power devices

Abstract

Abstract This letter, proposes and experimentally demonstrates a simple and efficient estimating method for high‐voltage floating field ring (FFR). Four rings in FFR are used to determine the influence of rings’ distance (d) on the voltage drops of the highest voltage to the third ring (Vn+1) and the third to the second ring (Vn). Then, two voltage curves (curves for Vn+1 and Vn) based on d are drawn. For a target breakdown voltage, by iterating between the curves for Vn+1 and Vn, the number of FFRs and corresponding distances can be found. Based on this method, an 8.0 kV PN diode with 111 FFRs is designed and fabricated. The measured breakdown voltage is 7840 V, which reaches 98% of the designed value. This method provides a simple and efficient design for high‐voltage SiC devices, especially for ultra‐high voltage applications where the number of rings exceeds dozens.

Keywords

• power MOSFET
• power semiconductor devices
• power semiconductor switches