Stitching equipotential metallization areas on the double-sided printed circuit board

Abstract

The linking (stitching) of equipotential metallization areas located on different layers of the printed circuit board is carried out using layer-to-layer vias. The purposes can be different, e. g.: heat removal from heat-loaded components, reduction of the thermal resistance of the board (reducing the risk of warping the board when exposed to thermal loads); reduction of the return current loop of high-speed signals, including differential ones; reduction of the level of electromagnetic interference. The paper reviews the problem of connecting the maximum number of unconnected copper islands on the fully routed twolayer board, which has ground planes on both sides with the help of vias. An iterative algorithm is proposed based on determining the area of the projections of isolated islands with the metallization area on the opposite sideboard, if a via can be placed in the intersection area. The algorithm guarantees the connection between the maximum number of islands.

Keywords

• printed circuit board
• metallization area
• layer-to-layer via