A Second Harmonic Current Suppression Strategy Based on a Digital Band-Stop Filter With Center Frequency Tracking Grid Frequency

Abstract

In a single-phase grid-tie system, the presence of a second harmonic current (SHC) on the DC side reduces the conversion efficiency and lifetime of the DC source. For a system whose front-end is a boost type converter, a digital band-stop filter (BSF) with a center frequency of 120 Hz could be introduced in the voltage sampling loop to suppress the SHC. However, in a grid that relatively lacks inertial support, the frequency will fluctuate over a broader range, resulting in a corresponding variation in the pulsation frequency of the SHC. Based on this, the digital BSF is combined with a phase-locked loop, and the center frequency is further designed to track the acquired grid frequency in real-time. The parameters of the BSF are updated in each interrupt program to provide optimal SHC suppression performance for arbitrary frequencies. An experimental prototype is built and tested. In the case of the grid frequency fluctuating continuously, the proposed method can effectively suppress SHC with a percentage of about 1% at all frequencies, which proves its validity and stability.

Keywords

• Grid-tie inverter
• second harmonic current
• phase-locked loop
• digital band-stop filter
• grid frequency fluctuation