A novel gate driver for Si/SiC hybrid switch for multi‐objective optimization

Abstract

Abstract A novel gate driver with simple functional and structural integration is proposed here, which splits the input gate signal and outputs two separate signals with a dedicated delay time to drive the two constitutional switches, aiming at the cost‐effectiveness and power loss reduction of the Si/SiC hybrid switch. The dependency of the hybrid switch's thermal and efficiency performance on the parameters of the gate driver are theoretically and experimentally investigated in a 9 kW 20 kHz Si/SiC hybrid switch based boost converter. A novel load current dependent gate control strategy is proposed to be implemented in the proposed gate driver to achieve the high conversion efficiency under light to medium load condition and balanced junction temperature between the two internal devices under heavy load conditions. The experimental results based on a 20 kHz boost converter show that the Si/SiC hybrid switch with the novel gate driver and optimal current dependent control strategy offers a 163% and 10% rise in power handling capability, respectively, compared to that using the all‐IGBT device and all‐SiC MOSFET device, and yet a considerably lower device cost.

Keywords

• Power electronics, supply and supervisory circuits
• Power semiconductor devices
• Optimisation techniques
• Control of electric power systems
• Optimisation techniques
• Relays and switches