A New Low-Voltage, Low-Power and High-Slew Rate CMOS Unity-Gain Buffer

Abstract

Class-AB circuits, which are able to deal with currents several orders of magnitude larger than their quiescent current, are good candidates for low-power and high slew-rate analog design. This paper presents a novel topology of a class AB flipped voltage follower (FVF) that has better slew rate and the same power consumption as the conventional class-AB FVF buffer previously presented in literature. It is thus suitable for low-voltage and low-power stages requiring low bias currents. These buffers have been simulated using 0.5µm CMOS Technology models provided by IBM. The buffer consumes 20µA from a 0.9V supply and has a bandwidth of 50MHz with a 18pF load. It has a slew rate of 9.8V/µs and power consumption of 42µw

Keywords

• flipped voltage follower
• class-AB circuits
• level shifting techniques
• high slew rate buffers
• CMOS integrated circuits.