Development of the principles of parallelization of the symmetric AES encryption algorithm

Abstract

This article delves into the potential of modern computational systems and technological advancements in refining encryption algorithms, with a particular focus on the Advanced Encryption Standard. The paper underscores the significance of understanding the intricate mechanics and primary processing stages of AES to harness its full potential for parallelization and acceleration. The research emphasizes the pivotal role of Graphics Processing Units in this optimization journey. Given their multi-threaded architecture, GPUs, when integrated with state-of-the-art parallel computing platforms like CUDA and OpenCL, can process vast data volumes with heightened efficiency. This integration not only speeds up the encryption process but also enhances its robustness. The article concludes with a forward-looking perspective, anticipating a deeper convergence between the realms of cryptography and parallel computing. Such a fusion is projected to usher in revolutionary enhancements in both the security and performance facets of encryption systems.