High-Speed and Cost-Efficient NAND Logic Gate Using a Single SOA-DI Configuration

Abstract

In this study, we propose a novel design for a NAND gate using a single semiconductor optical amplifier (SOA) followed by a delay interferometer (DI). This streamlined configuration significantly reduces complexity and cost compared to conventional methods, which typically require cascading multiple SOA-Mach–Zehnder interferometers (SOA-MZIs) for NAND gate implementation. Our approach directly generates the NAND logic output with a single SOA and DI, simplifying the overall design. The gate’s performance is evaluated at 80 Gb/s, achieving a high-quality factor (QF) of 10.75. We also analyze the impact of key parameters to optimize the gate’s functionality. Furthermore, we assess the effect of amplified spontaneous emission on the QF, providing a more comprehensive evaluation of the system’s performance. This research paves the way for more efficient and cost-effective complex optical logic circuit solutions.

Keywords

• NAND logic gate
• semiconductor optical amplifier
• delay interferometer
• quality factor