Implementation and testing of a FSK demodulator

Abstract

This work describes the implementation and testing of a FSK demodulator, within the framework of a modem re-engineering for navy communications. It was developed over a Spartan 6 XCSLX25 FPGA with its code in VHDL. For testing, a modulator was implemented in a STM32F407 microcontroller where different noise levels were added to the signal to try out the system.

Keywords

• fsk
• demodulación
• cuadri-correlator balanceado
• ensayo
• snr
• awgn
• ber
• fpga
• vhdl