Journal of Thermal Science and Technology (Aug 2017)

Thermal performance evaluation of cascode Paralleled-GaN-HEMTs packaging for high power switching applications

  • Hsin-Ping CHOU,
  • Stone CHENG

DOI
https://doi.org/10.1299/jtst.2017jtst0022
Journal volume & issue
Vol. 12, no. 2
pp. JTST0022 – JTST0022

Abstract

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This study investigated the heat generation behavior of normally-on GaN FET consisting of multi-chip AlGaN/GaN high electron mobility transistors (HEMTs) cascoded with a low-voltage MOSFET (LVMOS) and a SiC Schottky barrier diode (SBD) in a new design package to enable high power applications. The electric field intensity distribution and the hot spot position of the devices were analyzed by electrothermal simulation and the infrared temperature measurement. The transient thermal characteristics are probed by temperature sensitive parameters (TSPs). The changes in on-resistance (RON), maximum drain current (IDMAX), and transconductance (gm) with temperature from 25 °C to 150 °C are measured, and the correlations are investigated. Two paralleled GaN-HEMT, LVMOS, and SiC SBD were then integrated on a directly bonded copper (DBC) substrate in the four-pin metal case TO-257 and a newly designed REC-2015 package to evaluate steady thermal performance improvement of packaging. The temperature distribution of parallel-connected GaN HEMTs were analyzed in numerical thermal simulations and infrared thermography measurements. The analytical results of thermal analysis were confirmed by comparing with the infrared thermographic measurements and numerical results obtained from simulations using Ansys Icepak. According to the thermal measurement at power dissipation of less than 24 W, the peak temperatures of the GaN HEMTs are 144.7 °C and 132.6 °C with TO-257 and REC-2015 package.

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