A Theoretical Analysis of Frequency Multipliers of the Step Recovery Diode in the Shunt-Mode of Operation

Abstract

This paper presents the model of approximate broken-line elastance for the step recovery diode （SRD） in case where transition time is not zero （t（?）≠0）. Frequency multipliers of arbitrary nonlinear capacitor with an idler are generally considered, and explicit and useful formulae are given. In a detailed investigation of frequency multipliers of the SRD without idlers, we have derived the calculated formulae relating the efficiency and equivalent impedances of the multipliers with arbitrary transition time （t（?）） and current cut-off angle of the SRD. The results of these experiments also demonstrate that excellent efficiency and stability may be obtained with SRD high-order multipliers designed according to conclusions in this paper.