AIP Advances (Nov 2023)

Design of SiO2/4H–SiC MOS interfaces by sputter deposition of SiO2 followed by high-temperature CO2-post deposition annealing

  • Tae-Hyeon Kil,
  • Takuma Kobayashi,
  • Takayoshi Shimura,
  • Heiji Watanabe

DOI
https://doi.org/10.1063/5.0169573
Journal volume & issue
Vol. 13, no. 11
pp. 115304 – 115304-5

Abstract

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Oxidation of silicon carbide (SiC) is known to induce defects at the interface of the SiO2/SiC system. NO-annealing is a standard industrial method of nitridation, but oxidation may progress during NO-nitridation, which may generate interface defects. Here, we propose a new method of fabricating SiO2/SiC metal-oxide-semiconductor (MOS) devices: sputter deposition of SiO2 in an Ar/N2 gas mixture followed by high-temperature CO2-post deposition annealing to form SiO2 and incorporate nitrogen at the interface while suppressing oxidation of the SiC. We obtained the nitrogen depth profile by performing x-ray photoelectron spectroscopy and confirmed that most of the nitrogen atoms exist at the abrupt interface. While maintaining a low interface state density and good insulating property, we demonstrated much improved reliability of MOS devices compared to conventional NO-annealed samples, thanks to the well-designed SiO2/SiC interface by the proposed method.