Compact Integration of Hydrogen–Resistant a–InGaZnO and Poly–Si Thin–Film Transistors
Yunping Wang,
Yuheng Zhou,
Zhihe Xia,
Wei Zhou,
Meng Zhang,
Fion Sze Yan Yeung,
Man Wong,
Hoi Sing Kwok,
Shengdong Zhang,
Lei Lu
Affiliations
Yunping Wang
School of Electronic and Computer Engineering, Peking University, Shenzhen 518055, China
Yuheng Zhou
School of Electronic and Computer Engineering, Peking University, Shenzhen 518055, China
Zhihe Xia
State Key Laboratory of Advanced Displays and Optoelectronics and Technologies, Department of Electronic & Computer Engineering, The Hong Kong University of Science and Technology, Hong Kong 999077, China
Wei Zhou
State Key Laboratory of Advanced Displays and Optoelectronics and Technologies, Department of Electronic & Computer Engineering, The Hong Kong University of Science and Technology, Hong Kong 999077, China
Meng Zhang
College of Electronic and Information Engineering, Shenzhen University, Shenzhen 518060, China
Fion Sze Yan Yeung
State Key Laboratory of Advanced Displays and Optoelectronics and Technologies, Department of Electronic & Computer Engineering, The Hong Kong University of Science and Technology, Hong Kong 999077, China
Man Wong
State Key Laboratory of Advanced Displays and Optoelectronics and Technologies, Department of Electronic & Computer Engineering, The Hong Kong University of Science and Technology, Hong Kong 999077, China
Hoi Sing Kwok
State Key Laboratory of Advanced Displays and Optoelectronics and Technologies, Department of Electronic & Computer Engineering, The Hong Kong University of Science and Technology, Hong Kong 999077, China
Shengdong Zhang
School of Electronic and Computer Engineering, Peking University, Shenzhen 518055, China
Lei Lu
School of Electronic and Computer Engineering, Peking University, Shenzhen 518055, China
The low–temperature poly–Si oxide (LTPO) backplane is realized by monolithically integrating low–temperature poly–Si (LTPS) and amorphous oxide semiconductor (AOS) thin–film transistors (TFTs) in the same display backplane. The LTPO–enabled dynamic refreshing rate can significantly reduce the display’s power consumption. However, the essential hydrogenation of LTPS would seriously deteriorate AOS TFTs by increasing the population of channel defects and carriers. Hydrogen (H) diffusion barriers were comparatively investigated to reduce the H content in amorphous indium–gallium–zinc oxide (a–IGZO). Moreover, the intrinsic H–resistance of a–IGZO was impressively enhanced by plasma treatments, such as fluorine and nitrous oxide. Enabled by the suppressed H conflict, a novel AOS/LTPS integration structure was tested by directly stacking the H–resistant a–IGZO on poly–Si TFT, dubbed metal–oxide–on–Si (MOOS). The noticeably shrunken layout footprint could support much higher resolution and pixel density for next–generation displays, especially AR and VR displays. Compared to the conventional LTPO circuits, the more compact MOOS circuits exhibited similar characteristics.
