IEEE Open Journal of Circuits and Systems (Jan 2024)

StrideHD: A Binary Hyperdimensional Computing System Utilizing Window Striding for Image Classification

  • Dehua Liang,
  • Jun Shiomi,
  • Noriyuki Miura,
  • Hiromitsu Awano

DOI
https://doi.org/10.1109/OJCAS.2024.3401028
Journal volume & issue
Vol. 5
pp. 211 – 223

Abstract

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Hyper-Dimensional (HD) computing is a brain-inspired learning approach for efficient and fast learning on today’s embedded devices. HDC first encodes all data points to high-dimensional vectors called hypervectors and then efficiently performs the classification task using a well-defined set of operations. Although HDC achieved reasonable performances in several practical tasks, it comes with huge memory requirements since the data point should be stored in a very long vector having thousands of bits. To alleviate this problem, we propose a novel HDC architecture, called StrideHD. By utilizing the window striding in image classification, StrideHD enables HDC system to be trained and tested using binary hypervectors and achieves high accuracy with fast training speed and significantly low hardware resources. StrideHD encodes data points to distributed binary hypervectors and eliminates the expensive Channel item Memory (CiM) and item Memory (iM) in the encoder, which significantly reduces the required hardware cost for inference. Our evaluation also shows that compared with two popular HD algorithms, the singlepass StrideHD model achieves a 27.6 $\times$ and 8.2 $\times$ reduction in inference memory cost without hurting the classification accuracy, while the iterative mode further provides 8.7 $\times$ memory efficiency. Under the same inference memory cost, our single-pass mode StrideHD averagely achieves 13.56% accuracy improvement in comparison with the single-pass baseline HD, which is a similar performance even in comparison with the costly iterative baseline HD models. As an extension, the iterative retraining mode of StrideHD averagely provides 11.33% accuracy improvement to its single-pass mode, which can be accomplished in fewer iterations in comparison with the baseline HD algorithms. The hardware implementation also demonstrates that StrideHD achieves over 9.9 $\times$ and 28.8 $\times$ reduction compared with baseline in area and power, respectively.

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