Extraction of Device Structural Parameters Through DC/AC Performance Using an MLP Neural Network Algorithm

Abstract

We proposed a neural network (NN) approach that uses two multi-layer perceptron (MLP) NNs an encoder and a decoder to estimate the structural parameter (Spara) of a 14-nm node fully depleted silicon on insulator (FDSOI) field-effect transistor (FET). When outputs defined by the same input exist, the proposed NN algorithm achieves loss function convergence during NN training. The decoder takes inputs of on/off current ratio, delay, and power to represent DC/AC performance for high performance (HP), low operating power (LOP), and low standby power (LSTP) applications. With the pre-trained encoder learned with R coefficients of the regression plot over 0.99 and an average percent error of approximately 1%, the decoder was modeled to estimate the Spara. Our decoder successfully estimated all Spara within the range that satisfies the technology node. The tendency of Spara satisfying the desired figure-of-merits (FOMs) in device design can be confirmed by comparing the estimated Spara of the upper 5 % and 10 % cases. Furthermore, it can provide device design guidance from various perspectives by presenting numerous alternatives of distinct Spara sets, even when the FOM value is the same (duplicate input values). If undesirable FOMs are extracted, it is possible to determine the causal Spara and provide immediate process feedback on the related unit process using the Spara estimated from the lower 5 % of FOMs. We performed a detailed physical analysis as an example of a delay in LOP application. NN estimation results were analyzed using gate length ( $L_{g}$ ), SOI thickness ( $T_{soi}$ ), and drain-side spacer length ( $L_{spd}$ ), which mainly affect gate capacitance ( $C_{g}$ ) and effective current ( $I_{eff}$ ). In addition, source-side spacer length ( $L_{sps}$ ) and source/drain junction gradient ( $L_{sdj}$ ) showed behaviors different from those generally selected by human experts and cases where maximal values were not estimated within the set range. The estimation of Spara using the NN was effective and powerful, reducing process cost and feedback time.

Keywords

• Device design
• device structural parameters
• FDSOI FET
• figure-of-merits
• machine learning
• manufacturing process