Low-Power Heterodyne Receiver Architectures: Review, Theory, and Examples

Abstract

The growth of the Internet of Things (IoT) has led to a massive upsurge in low-power radio research. Specifically, low-power receivers (RX) have been developed that efficiently receive data and extend the battery life for energy-constrained IoT systems. This has led to innovations in energy-detector (ED) first RXs which can achieve much lower power than traditional mixer-based heterodyne architectures. However, at such low-power levels, the RX performance is extremely limited. Oftentimes, low-power RXs have severe performance limitations, including lower data rate, limited blocker rejection, lower sensitivity, lower tolerance to PVT, limited modulation compatibility, and increased size and cost of off-chip components to achieve passive gain. This greatly limits the application of such RXs in real-world applications and prevents many of the low-power circuit techniques from translating to commercial standards. In this work, we look to motivate research into low-power heterodyne RX architectures which can support higher order modulation and have improved RX specifications while retaining low power.

Keywords

• Energy-detector (ED)-first
• frequency-shift keying (FSK)
• low-power heterodyne
• low-power radio
• low-power receiver architecture
• mixer-first receiver