Conduction and Dead-Time Voltage Drops Estimation of Asymmetric Cascaded H-Bridge Converters Utilizing Level-Shifted PWM Scheme

Abstract

Linear AC power supplies can be replaced by their nonlinear switching counterparts due to the lower voltage drops and higher efficiency and power density of switching-mode inverters. Multilevel cascaded H-bridge (CHB) converters are the preferred inverter structure because of modular configuration, control, and protection. The output voltage quality in CHB converters depends on the number of output levels. Asymmetric CHBs (ACHBs) produce an output voltage with higher number of levels with respect to CHBs for the same number of cascaded modules. This results in the reduction of power supply size, voltage drops, and losses. Considering the relative high switch counts, analysis of the effect of conduction and dead-time voltage drops on the inverter output characteristics is an important challenge in designing multilevel converters. In this paper, a generic algorithm is presented to calculate the conduction and dead-time voltage drops of ACHBs utilizing level-shifted modulation. These voltage drops give the necessary information for the design of heatsinks, switch selection, output impedance estimation, and the compensation schemes. It is shown through theoretical and simulation studies that the aforementioned voltage drops of ACHBs are to be calculated in a different manner with respect to the CHBs which mostly use the phase-shifted modulation.

Keywords

• achb
• conduction and dead-time voltage drops
• equivalent impedance
• level-shifted modulation
• switching pattern