Nature Communications (Jun 2021)

An in-memory computing architecture based on two-dimensional semiconductors for multiply-accumulate operations

  • Yin Wang,
  • Hongwei Tang,
  • Yufeng Xie,
  • Xinyu Chen,
  • Shunli Ma,
  • Zhengzong Sun,
  • Qingqing Sun,
  • Lin Chen,
  • Hao Zhu,
  • Jing Wan,
  • Zihan Xu,
  • David Wei Zhang,
  • Peng Zhou,
  • Wenzhong Bao

DOI
https://doi.org/10.1038/s41467-021-23719-3
Journal volume & issue
Vol. 12, no. 1
pp. 1 – 8

Abstract

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In standard computing architectures, memory and logic circuits are separated, a feature that slows matrix operations vital to deep learning algorithms. Here, the authors present an alternate in-memory architecture and demonstrate a feasible approach for analog matrix multiplication.