A fast switched reluctance motor controller based on FPGA

Abstract

The paper presents the concept and practical implementation of a switched reluctance motor control system in an FPGA programmable device. The developed control system was designed for testing high-speed motors in order to limit the delays of output signals in relation to the signals from the encoder. The controller enables the values of commutation angles and PWM voltage to be set along with current limit values, measures the values of voltages and currents, and sends the results to the computer to be archived.