Power Semiconductor SMD Package Embedded in Multilayered Ceramic for Low Switching Loss

Abstract

We propose a multilayered‐substrate‐based power semiconductor discrete device package for a low switching loss and high heat dissipation. To verify the proposed package, cost‐effective, low‐temperature co‐fired ceramic, multilayered substrates are used. A bare die is attached to an embedded cavity of the multilayered substrate. Because the height of the pad on the top plane of the die and the signal line on the substrate are the same, the length of the bond wires can be shortened. A large number of thermal vias with a high thermal conductivity are embedded in the multilayered substrate to increase the heat dissipation rate of the package. The packaged silicon carbide Schottky barrier diode satisfies the reliability testing of a high‐temperature storage life and temperature humidity bias. At 175 °C, the forward current is 7 A at a forward voltage of 1.13 V, and the reverse leakage current is below 100 μA up to a reverse voltage of 980 V. The measured maximum reverse current (IRM), reverse recovery time (Trr), and reverse recovery charge (Qrr) are 2.4 A, 16.6 ns, and 19.92 nC, respectively, at a reverse voltage of 300 V and di/dt equal to 300 A/μs.

Keywords

• Low‐temperature co‐fired ceramic
• Multilayered substrate
• Power semiconductor
• Reliability
• Schottky barrier diode
• Switching loss