Dianxin kexue (Jun 2023)
Design on the full-dimensional reconfiguration polymorphic network switching chip architecture
Abstract
At present, IP network has the problems of rigid structure, poor scalability and poor security.To solve these problems, the concept of polymorphic network has been proposed by researchers and gradually become a research hotspot.The programmable network switching chip is the basis of polymorphic network implementation.Therefore, a full-dimensional reconfigurable polymorphic network switching chip architecture was proposed.Based on eFPGA in the chip, the port-level and bit-level fine-grained reconfigurable polymorphic network was realized.Based on self-designed process element (PE), the coarse-grained reconfigurable network switching engine was realized.Thereby the full-dimensional reconfigurable polymorphic network switching chip was realized and laid the foundation for the data layer of polymorphic network.To improve the network switching performance, an improved bit vector algorithm was proposed, which could realize fast flow table lookup with a smaller resource consumption.The proposed algorithm has showed its practicability in the research.
