Double-Synchronous-Reference-Frame-Based Power-Synchronized PLL-Less Grid-Following Inverters for Unbalanced Grid Faults

Abstract

This article proposes a double-synchronous-reference-frame-based power-synchronized grid-following inverter (DS-PSGFLI). In contrast to existing types of phase-locked-loop (PLL)-based grid-following inverters (GFLIs) and PLL-less power-synchronized GFLIs (PSGFLIs), the suggested PLL-less DS-PSGFLI operates seamlessly during unbalanced grid faults in both strong and weak grid connections, while maintaining stability and avoiding oscillations. Furthermore, unlike previous control strategies for PSGFLIs that regulate terminal output power, the proposed method regulates the power at the point of common coupling (PCC). This approach aligns with common PCC control strategies in GFLIs and grid-forming inverters, thereby avoiding the impacts of voltage drop across the inverter output filter and high voltage harmonics at the inverter terminal. In the proposed DS-PSGFLI, the positive and negative sequences of the PCC voltage and current measurements are first extracted. Then, an outer power controller is employed to regulate the positive active and reactive power at the PCC to the desired references. The outer power controller generates both the positive internal angle required for grid synchronization and the positive current reference for the inner current of the positive sequence loop. When unbalanced grid faults occur, the negative sequence loop adjusts its output signals to mitigate the resulting oscillations at twice the fundamental frequency. The effectiveness of the proposed control strategy is validated through simulations and experimental tests, demonstrating its reliable performance across a wide range of test scenarios.

Keywords

• Phase locked loops
• positive and negative sequence control
• power-synchronized control
• PLL-less inverters
• short-circuit-ratio
• stability